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TS8xCx2X2
4184I–8051–02/08
Programming Algorithm
The Improved Quick Pulse algorithm is based on the Quick Pulse algorithm and
decreases the number of pulses applied during byte programming from 25 to 1.
To program the TS87C52X2 the following sequence must be exercised:
Step 1: Activate the combination of control signals.
Step 2: Input the valid address on the address lines.
Step 3: Input the appropriate data on the data lines.
Step 4: Raise EA/VPP from VCC to VPP (typical 12.75V).
Step 5: Pulse ALE/PROG once.
Step 6: Lower EA/VPP from VPP to VCC
Repeat step 2 through 6 changing the address and data for the entire array or until the
end of the object file is reached (See Figure 12.).
Verify Algorithm
Code array verify must be done after each byte or block of bytes is programmed. In
either case, a complete verify of the programmed array will ensure reliable programming
of the TS87C52X2.
P 2.7 is used to enable data output.
To verify the TS87C52X2 code the following sequence must be exercised:
Step 1: Activate the combination of program and control signals.
Step 2: Input the valid address on the address lines.
Step 3: Read data on the data lines.
Repeat step 2 through 3 changing the address for the entire array verification (See Fig-
ure 12.)
The encryption array cannot be directly verified. Verification of the encryption array is
done by observing that the code array is well encrypted.
Figure 12. Programming and Verification Signal’s Waveform
EPROM Erasure
(Windowed Packages
Only)
Erasing the EPROM erases the code array, the encryption array and the lock bits return-
ing the parts to full functionality.
Erasure leaves all the EPROM cells in a 1’s state (FF).
Erasure Characteristics
The recommended erasure procedure is exposure to ultraviolet light (at 2537 ) to an
integrated dose at least 15 W-sec/cm2. Exposing the EPROM to an ultraviolet lamp of
Control signals
Data In
ALE/PROG
A0-A12
Programming Cycle
100s
D0-D7
EA/VPP
Data Out
Read/Verify Cycle
12.75V
5V
0V
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